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BMCHG

SC140 DSP Core Reference Manual A-69

BMCHG Bit-Masked Change a BMCHG

16-Bit Operand (BMU)

Description

These operations use an unsigned 16-bit immediate data mask to invert selected bits in the

destination operand. For each bit i that is set (selected) in the mask, the bit i in the corresponding

destination operand’s bit position is inverted. Bits that are not selected as well as bits in the other

part of the register are unaffected. These operations read from a register, modify the retrieved

value, and write the new value back to that register. The operation is equivalent to the

exclusive-or function.

Note: Special care must taken when using this instruction to clear bits on the EMR register due to this

Status and Conditions that Affect Instruction

Operation Assembler Syntax

~C1.H

→ C1.H

(i denotes bits=1 in #u16)

BMCHG #u16,C1.H {0 ≤ u16 < 2

}

~C1.L

→ C1.L

BMCHG #u16,C1.L {0 ≤ u16 < 2

}

~DR.H

→ DR.H

BMCHG #u16,DR.H {0 ≤ u16 < 2

}

~DR.L

→ DR.L

BMCHG #u16,DR.L {0 ≤ u16 < 2

}

BMCHG

#u16,C1.H

Inverts selected bits in the contents of the HP of a control register (C1).

BMCHG

#u16,C1.L

Inverts selected bits in the contents of the LP of a control register (C1).

BMCHG

#u16,DR.H

Inverts selected bits in the contents of the HP of a data or address register (DR).

BMCHG

#u16,DR.L

Inverts selected bits in the contents of the LP of a data or address register (DR).

SR[18] EXP Determines execution working mode for instructions that have these

registers as an operand.

1 2 ... 378 379 380 381 382 383 384 385 386 387 388 ... 759 760

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